Figure shows a 4 to 1 MUX to be used to implements the sum S os a

Figure shows a 4 to 1 MUX to be used to implements the sum S os a
| Figure shows a 4 to 1 MUX to be used to implements the sum S os a 1-bit full adder with input bits P and Q and the carry input Cin. Which of the following combinations of inputs to I0,I1,I2 and I3 of the MUX will realize the sum S?

A.

B.

C.

D.

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Right Answer is:

SOLUTION

For 4 : 1 mux



Where sum of full adder is =
Truth table of Full adder

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