In a MOS capacitance fabricated on a P-type semiconductor, a stro

SOLUTION

When the semiconductor in a MOS is in inversion, the intrinsic energy level crosses over Fermi level and goes as deep into the other side of Fermi at the interface as distant it is from the Fermi level in the bulk. 

For an n-type substrate MOSFET, depending upon the value of the gate voltage applied, the MOS capacitor works in three modes:

Accumulation: In this mode for V_GS < 0 the holes accumulate near the oxide surface and all the field lines emanating from the gate terminate on this layer giving an effective dielectric thickness as the oxide thickness.

Depletion: As V_GS values move from negative to positive values the holes at the interface are repelled and pushed back into the substrate leaving a depleted layer. This layer counters the negative charge on the gate and keeps increasing till the gate voltage is below the threshold voltage. We see a larger effective dielectric length and hence a lower capacitance.

Strong Inversion: When V_GS crosses threshold voltage, the increase in depletion region width stops, and charge on layer is countered by mobile holes at the Si-SiO2 interface. This is called inversion because the mobile charges are opposite to the type of charges found in the substrate. In this case, the inversion layer is formed by the electrons.

∴ As the surface potential becomes equal to twice the Fermi level, the holes overcome the depletion layer and form the inversion channel. The surface potential at the inversion layer is positive due to majority carriers in the substrate which are holes.