The circuit shown below implements a:
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The circuit shown below implements a:
A. OR Logic
B. NOR Logic
C. NAND Logic
D. AND Logic
Please scroll down to see the correct answer and solution guide.
Right Answer is: B
SOLUTION
The output from MUX-X is given by:
A̅ Io + A I1
Given, Io = 1 and I1 = 0
So, F1 (Output from MUX-X) = A̅
Now, Output from MUX-Y is;
\(F = \overline {\left( {\bar A} \right)} .\left( 0 \right) + \bar {A} \bar B\)
\(F = \bar A\bar B = \overline {A + B}\) which is NOR Logic only.