Truth table of the four NAND gates shown in the figure

| Truth table of the four NAND gates shown in the figure is

A. $\begin{matrix} A & B & Y 0 & 0 & 0 0 & 1 & 1 1 & 0 & 1 1 & 1 & 0 \end{matrix}$

B. $\begin{matrix} A & B & Y 0 & 0 & 0 0 & 1 & 0 1 & 0 & 1 1 & 1 & 1 \end{matrix}$

C. $\begin{matrix} A & B & Y 0 & 0 & 1 0 & 1 & 1 1 & 0 & 0 1 & 1 & 0 \end{matrix}$

D. $\begin{matrix} A & B & Y 0 & 0 & 1 0 & 1 & 0 1 & 0 & 0 1 & 1 & 1 \end{matrix}$

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$\begin{matrix} A & B & Y & Y_{1} & Y_{2} & Y 0 & 0 & 1 & 1 & 1 & 0 0 & 1 & 1 & 1 & 0 & 1 1 & 0 & 1 & 0 & 1 & 1 1 & 1 & 0 & 1 & 1 & 0 \end{matrix}$