The Inputs of a Half Adder are A = 1, B = 1. The outputs are conn

SOLUTION

Concept:

Half Adder:

Half Adder is an arithmetic combinational circuit that adds two numbers and produces a sum bit (s) and carry bit (C) as the output.

If A and B are the input bits, then sum bit (s) is the XOR of A and B and the carry bit (C) will be the AND of A and B.

Truth table of Half Adder is given below

Input		Output
A	B	S	C
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

 

S = A ⊙ B

C = A ⋅ B

The half adder can odd only two input bits (A and B) and has nothing to do with the carry if there is any input.

So if the input to a half adder have a carry, then it will be neglected it and add only the A and B bits, which means the binary addition process is not complete and that’s why it is called a half adder.

 

Multiplexer (MUX):

Multiplexer (MUX) is a combinational logic circuit designed to switch one of several input lives through a single common output line by application of control signal.

Output expression of 4:1 Mux is

Q = a̅ b̅ A + a̅ b B + a b̅ C + a b D

Calculation:

Given:

A = 1 ; B = 1 ; S₀ = lower bit

S₁ = upper bit

We know output of half Adder

S = A ⊙ B

C = A ⋅ B

∴ S = 1 ⊙ 1 = 0

C = 1.1 = 1

EXOR

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	0

 

AND

A	B	Y
0	0	0
0	1	0
1	0	0
1	1	1

 

Now, output of MUX is

Y = S̅₁ S̅₀ I₀ + S̅₁ S₀ I₁ + S₁ S̅₀ I₂ + S₁ S₀ I₃

Where

S₁ = S = 0

S₀ = C = 1

∴ Y = 0̅.1̅ . I₀ + 0̅ . 1 . I₁ + 0.1̅.I₂ + 0.1.I₃

Y = 1.0.I₀ + 1.1.I₁ + 0.0.I₂ + 0.1.I₃

Y = 0 + I₁ + 0 + 0

Y = I₁

NOTE:

If someone took ‘S₀’ as upper bit and ‘S₁’ as lower bit, it would display wrong answer. As:

Y = 1̅.0̅.I₀ + 1̅.0̅.I₁ + 1.0̅.I₂ + 1.0.I₃

Y = 0.1.I₀ + 0.0.I₁ + 1.1.I₂ + 1.0.I₃

Y = 0 + 0 + I₂ + 0

Y = I₂